Professor, CSE Dept., IIT Delhi
Head, Khosla School of Information Technology
Editor-in-Chief, IEEE Embedded Systems Letters journal
Post-Doctoral Researcher, IIT Delhi
Research Interests: Data Indexing and Management, Caches, Memory/Storage Systems and Architectures, Embedded Systems, Next‑ Generation Non‑Volatile Memory, AI/ML
PhD Student, IIT Delhi
Research Interests: Application-specific Optimizations for 3D Memories, Thermal Challenges in Neural Networks, Compiler
PhD Student, IIT Delhi
Research Interests: Computer Architecture, Embedded Systems, High Performance Computing.
PhD Student, IIT Delhi
Research Interests: Energy Efficiency in Power Constrained Devices, Embedded System Design, Computer Architectures.
PhD Student, IIT Delhi
Research Interests: Energy-efficient Memory, Non-Volatile and Hybrid Memory, NVM Caches
PhD Student, IIT Delhi
Research Interests: Hardware Accelerators, Smart Interconnects and System Level Design.
PhD Student, IIT Delhi
Research Interests: Memory, High performance computing, Information Security
PhD Student, IIT Delhi
Research Interests: Computer Architecture, System Design and Modelling, Deep Learning Accelerators.
MSR Student
IPsec Accelerators
M.Tech Student
Accelerator-SoC integration
M.Tech Student
Cache Management
B.Tech Student
Cache Management
B.Tech Student
Cache Management
B.Tech Student
Thermal Management in 3D DRAM
Professor, School of Electrical Computer and Energy Engineering, Arizona State University
Assistant Professor, Electrical & Computer Engineering, Texas A&M University
Xilinx Fellow and Chief Architect, Xilinx
Director Of Engineering,Google
| Rajesh Kedia, Joined as Assistant Professor, IIT Hyderabad |
| Name | Year of graduation. Joined... | Thesis Title |
|---|---|---|
| Lokesh Siddhu | 2022. Joined as Researcher at Chair for Embedded System (CES), Karlsruhe Institute of Technology, Germany. | Leakage aware dynamic thermal management for 3D memory architectures |
| Neetu Jindal | 2019. Joined Intel. Jointly supervised by S. R. Sarangi. Collaborations with Sanjiva Prasad. | Post-silicon Validation for Heterogeneous Multicore Architectures |
| Sandeep Chandran | 2018. Joined IIT Palakkad. Jointly supervised by S. R. Sarangi. Collaborations with Sanjiva Prasad. Awards: Winner of FITT Award (incl. cash prize of Rs. 60,000 for students and Rs. 30,000 for supervisors) for the Best Industry Relevant PhD Project in IIT Delhi at the 49th Annual Convocation of IIT Delhi. | FlexDFD: Flexible DFD Hardware For Efficient Post-Silicon Validation |
| Rahul Jain | 2017. Joined Reniac. Awards: Winner of the Best PhD Thesis Award at the 32nd International Conference on VLSI Design and 18th International Conference on Embedded Systems (VLSID), New Delhi, January 2019, awarded by the VLSI Society of India. | Machine Learned Machines: Reinforcement Learning Exploration for Architecture Co-optimization |
| Prasenjit Chakraborty | 2015. Joined Intel. | Memory Hierarchy Partitioning and Data Mapping Techniques for Scratch Pad based Architectures |
| Namita Sharma | 2015. Joined Intel. | Energy Optimizations for Scratch Pad Memory based SIMD Architectures |
| Vaibhav Jain | 2015. Joined DAVV. Jointly supervised by Anshul Kumar. | A UML Based Framework For Transaction Level Modeling |
| Krishnaiah Gummidipudi | 2013. Joined Intel. Jointly supervised by Anshul Kumar. | Accelerating Emulation for Rapid Design Space Exploration of On-chip Networks |
| B. V. N. Silpa | 2012. Joined Nvidia. | Power Optimizations for Graphics Processors |
| Neeraj Goel | 2012. Joined IIT Ropar. Jointly supervised by Anshul Kumar. | Scalable Low Energy Register File Architectures for VLIW Processors |
| Anant Vishnoi | 2010. Joined Cadence. Jointly supervised by M. Balakrishnan. | Efficient Cache State Dumping for Post-silicon Processor Validation |
| Aryabartta Sahu | 2010. Joined IIT Guwahati. Jointly supervised by M. Balakrishnan. | Evaluation and Mapping of Applications on Heterogeneous Multiprocessor Systems |
| Name | Year of graduation. | Thesis Title |
|---|---|---|
| Zilmarij Iqbal | 2023 | Combining core-DVFS and NUCA Placement for Energy Optimisation in On-chip Multiprocessors |
| Manoj Jain | 2012 | Power supply efficiency aware resource allocation in data centers |
| Srikanth Kurra | 2007 | Algorithms for delay and power optimizations in behavioral synthesis |
| Rakesh Nalluri | 2007 | Improving the effectiveness of register files and scratch pad memory in embedded system design |
