Memory Optimization and Exploration
Collaborators : IBM, IMEC
In earlier work, we introduced the concept of Scratch Pad Memory (SPM) (P. R. Panda, N. D. Dutt, A. Nicolau, Efficient utilization of scratch-pad memory in embedded processor applications. ED&TC 1997) and investigated ways to partition on-chip data memory space between scratch pad memory and data cache.
The book Memory issues in Embedded Systems-on-chip captures some of the recent developments on data memory optimisations in embedded systems. Our paper Data and memory optimization techniques for embedded systems (ACM TODAES, Apr 2001) has been the most downloaded paper of the journal for several years.
As memory technologies evolve, we continue to investigate different ensuing system-level research problems: Non-volatile and 3D memories, software caches, data layout, SPM with vector registers, etc.
In more recent times, we have explored the idea of implementing Software Caches on scratch pad memories, and optimising applications on processor systems with vector registers and SPM.
