Thermal-Aware Management of 3D Memory
3D DRAM systems offer the advantages of high memory bandwidth and density, but incur thermal problems due to higher power densities. We are researching ways to maximise system performance in the presence of 3D memories while respecting temperature constraints. We have studied the effect of leakage and dynamic power on 3D memory temperature, and data migration strategies to address thermal issues.
Thermal-Aware Runtime Management of 3D Architecture
Introduction:
Traditional memory design is unable to serve modern data needs-
With the growing video and audio content/data, the amount of memory (RAM) required is increasing. Also, many modern applications (e.g., AI, ML) access a large amount of data in a short span of time. To address these issues, memory (RAM) designers have kept on increasing the density and frequency of memory devices. However, device scaling has reached saturation, and it's becoming difficult to manufacture small sized memory cells reliably. We need newer memory technologies to address these challenges.
3D Integration: An opportunity-
Traditional memories arrays have rectangular (row-column) layout, and memory cells are present at the intersection of row and column. One of the proposed ideas (to overcome the challenges) is to stack (and interconnect) multiple memory arrays in a 3D structure. Stacking will help store large amounts of data in a small area and also, a large number of interconnects will allow fast data access (in a short time).
Thermal Challenges in 3D Integration-
3D memories offer other advantages (as well) like lower interconnect power (because of shorter wiring) and the ability to stack memories designed on different technologies (heterogeneous technology integration). However, the power per unit area increases (due to stacking) and heat dissipation becomes difficult due to which 3D devices can get (quickly) overheated.
Also, due to non-idealities in transistors and capacitors, each memory cell contributes to leakage current causing significant leakage power dissipation in memories (~40% of the total memory power). Moreover, leakage current/power increases exponentially with temperature, thereby creating a positive feedback loop between temperature and leakage. From our experiments, we find that leakage increases the temperature by ~25 °C.
Is heating a problem?
Electronic components work reliably only in a particular (operating) temperature range. If overheated, the device cannot be accessed (stalled), and they are allowed to cool down (cooling time). Desktops and servers are usually kept in air-conditioned rooms (incurring considerable cooling costs) so that operating temperature ranges are not exceeded frequently. Further, we regularly see on mobile devices (like laptop, mobiles) that users are unable to use the device if it's too hot (temperature might still be in the operating range).
The goal of our research-
For a system with 3D memory, run applications without violating the thermal limit while maximizing the performance of the system.
Alleviating Thermal Challenges by Data Mapping and Reducing Leakage-
Heat dissipation is a significant challenge in 3D technologies. Heat sinks provide an efficient cooling solution and can cool down the top layers of the memory. However, the bottom layers have limited heat dissipation paths. We can map frequently accessed data on the top layers so that the memory doesn't get heated (often) and hence, reduce the stalls. Moreover, we can reduce leakage power by migrating data from hot channels and then turning them OFF.
Abstract:
Research in 3D integration has attracted researchers from industries as well as academics due to its benefits over 2D architecture such as better performance, lower power consumption, small form factor and support for heterogeneous technology integration. Furthermore, various 3D memories architectures have been proposed by industries/academia to cater to the high bandwidth requirement at low power. However, due to its higher power density and reduced heat dissipation properties, heat dissipation is one of the significant challenges in the promising 3D integration technology. In this research, we aim to reduce leakage power and also, design data/task mapping policies to meet thermal constraints (for 3D memory architectures).
Publications:
- Lokesh Siddhu, and Preeti Ranjan Panda. "FastCool: Leakage Aware Dynamic Thermal Management of 3D Memories." Proceedings of Design, Automation, and Test in Europe (DATE), March 2019.
- Lokesh Siddhu and Preeti Ranjan Panda. "PredictNcool: Leakage Aware Thermal Management for 3D Memories Using a Lightweight Temperature Predictor." ACM Transactions on Embedded Computing Systems (TECS), 18(5s): 64:1-64:22 (2019)
- Lokesh Siddhu, Rajesh Kedia, Preeti Ranjan Panda. "Leakage-Aware Dynamic Thermal Management of 3D Memories." ACM Transactions on Design Automation of Electronic Systems (TODAES), 26(2):1-31, October 2020